Paper Title
FPGA Implementation Of A Distributed Canny Edge Detector

Edges represent the significant local changes in the intensity of an image. Image Edge detection significantly reduces the amount of data and filters out useless information, while preserving the important structural properties of an image. A distributed canny edge detection algorithm is used which results in the reduced memory requirements, decreased latency and increased throughput with no loss in the performance of the edge detection, when compared to that of the original Canny algorithm. An FPGA-based hardware architecture of the proposed algorithm is synthesized on Xilinx virtex-2 pro.