Paper Title
A Review Approach Of Power Grid Analysis In Vlsi Designs

One of the most critical challenges in today’s CMOS VLSI design is the lack of predictability in chip performance at design stage. One of the process variability comes from the voltage drop variations in on-chip power distribution networks. Power distribution systems in integrated circuits are used to provide the voltages and currents the devices need to operate properly. It provides the voltages and currents that devices in a circuit need to operate properly and silicon success requires its careful design and verification. In our work, we have Proposed the cell characterization methodology for instantaneous IR drop analysis as well as Power Up analysis for MTCMOS, computed resistances and capacitors based on technology data for 130nm node. A sample program was written to realize the mesh structure. This new algorithm is very efficient and scalable for huge networks with a large number of variation variables.