Paper Title
Fault Tolerance In Multi-Core Processors Using Flexible Redundant Threading

Abstract
This paper makes a case for incorporating fault tolerance covering both transient faults and errors due to miss-speculation into desktop multi-core processors. Fault tolerance is enforced in our method through redundant threading by verifying the commit results of speculative original thread against the non-speculative redundant thread which is a delayed version of the original thread. Our method differs from previously proposed redundant execution fault-tolerant designs including Active-stream/Redundant-stream Simultaneous Multithreading (AR SMT) [8], Simultaneous and Redundantly Threaded (SRT) processor [2], Chip-Level Redundant Threading (CRT) [3] in cases that it covers errors due to miss-speculation, dynamic hardware configuration, reuse of resource for normal computation, flexibility in fault-tolerant enforcement.