Paper Title :Comparative Study Of Cmos Full Adders In 0.13µm Technology
Author :Ayushi Singh, Manoj Kumar, Shweta Dabas
Article Citation :Ayushi Singh ,Manoj Kumar ,Shweta Dabas ,
(2015 ) " Comparative Study Of Cmos Full Adders In 0.13µm Technology " ,
International Journal of Advance Computational Engineering and Networking (IJACEN) ,
pp. 15-18,
Volume-3, Issue-7
Abstract : Full adders are the basic building blocks of almost all digital VLSI circuits. Adder is one of the most fundamental
blocks present in ALU (Arithmetic and logical unit). Continuous improvements are being done to improve the performance
of adders. These improvements are motivated by minimizing transistor count, power consumption and delay in operation. in
this paper, four cmos adders have been studied and compared in 0.13µm technology. Full adders studied here are
complementary pass transistor logic (CPL) full adder, conventional CMOS-based full adder, transmission gate adder (TGA)
and full adder using 16 transistors. These adders have been compared for power consumption and PDP with varying voltages
from 1.8 to 3.3 V.
Index Terms – full adder, CPL full adder, Conventional full adder, TGA full adder, full adder made of 16 transistors, sum,
carry, PDP.
Type : Research paper
Published : Volume-3, Issue-7
DOIONLINE NO - IJACEN-IRAJ-DOIONLINE-2496
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Copyright: © Institute of Research and Journals
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Published on 2015-07-02 |
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