International Journal of Advance Computational Engineering and Networking (IJACEN)
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Statistics report
Sep. 2020
Submitted Papers : 80
Accepted Papers : 10
Rejected Papers : 70
Acc. Perc : 12%
Issue Published : 90
Paper Published : 1248
No. of Authors : 3136
  Journal Paper

Paper Title
Comparative Study Of Cmos Full Adders In 0.13µm Technology

Abstract
Full adders are the basic building blocks of almost all digital VLSI circuits. Adder is one of the most fundamental blocks present in ALU (Arithmetic and logical unit). Continuous improvements are being done to improve the performance of adders. These improvements are motivated by minimizing transistor count, power consumption and delay in operation. in this paper, four cmos adders have been studied and compared in 0.13µm technology. Full adders studied here are complementary pass transistor logic (CPL) full adder, conventional CMOS-based full adder, transmission gate adder (TGA) and full adder using 16 transistors. These adders have been compared for power consumption and PDP with varying voltages from 1.8 to 3.3 V. Index Terms – full adder, CPL full adder, Conventional full adder, TGA full adder, full adder made of 16 transistors, sum, carry, PDP.


Author - Ayushi Singh, Manoj Kumar, Shweta Dabas

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| Published on 2015-07-02
   
   
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