Paper Title :Parallelizing Sequentially Written Code on Multi-Core: Programming Languages at Wire-Speeds

Author :Solomon Harsha, Khaldoun Khashanah

Article Citation :Solomon Harsha ,Khaldoun Khashanah , (2018 ) " Parallelizing Sequentially Written Code on Multi-Core: Programming Languages at Wire-Speeds " , International Journal of Advance Computational Engineering and Networking (IJACEN) , pp. 1-9, Volume-6, Issue-10

Abstract : Compute-Communicate Continuum[1] (CCC) supercomputing technology attempts to increase computational power by creating high performance computational pipelines either on multi-core of FPGA’s or on conventional servers. Based on this computational power, expert systems can be designed to solve any problem at hand. In order to accelerate an application on these expert systems, CCC supercomputing converts streams sequence of instructions into dynamic systolic arrays, which can run on these cores at wire speeds. This paper outlines architectural details and methods of parallelization of a sequentially written code in any computer language particularly command interpreted languages on CCC Supercomputing paradigm. Thus, applications written on CCC supercomputing paradigm can run at wire speeds. Particular attention is paid as to how to achieve dynamic binding[2,4] of functions at run time using configurable systolic arrays. Also discussed is the topic of data dependent computations, which would seem to be counter-intuitive to the configurable computing paradigm. The paper concludes with a summary of performance indicators of diverse command-interpreted languages and the functions written based on them. Keywords - FPGA, computer language

Type : Research paper

Published : Volume-6, Issue-10

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